Mein Besuch bei der FPGA Conference 2026 in wenigen Worten zusammengefasst.

Inhalt der Folge:
* FPGA Conference 2026
* Organic Cybersecurity and Cyberresilience
* Communication in Multi-FPGA Systems
* CDCs, FIFOs, and Width Converters: How to Combine Open Logic Building Blocks Correctly
* fwk: A Platform-Independent, Open-Source Framework for Heterogeneous SoC Development in Scientific Instrumentation
* Introduction to FPGA Security: Building a Hardware Root of Trust
* FPGAs in Safety Critical Applications – Key Considerations, Challenges and Opportunities in Automotive and Industrial Designs
* FPGA components for direct AXI-Stream to UDP/IP/Ethernet Networking
* Making Electronics Under Pressure
* How-to Run a Efinix FPGA Design Without Leaving the Command Line
* Multiboot for Design Variants and Field Update in Adaptive SoCs
* PCI Express Data streaming directly into the GPU
* Visualizing Metrics from AXI Performance Monitors in Prometheus/Grafana
* PoC-Library v3.0: AXI4(-Lite) Interconnect Infrastructures
* FPGA Development on Linux: The time is now
* Recycling Tricky Historical Algorithms for FPGA Usage: Toepler’s Algorithm for Numerical Root Computation
* AMD FreeRTOS to Zephyr
* Open-Source Tools for Commercial FPGAs are There – and There is More to it
* Precision Warping for Advanced Imaging: When Optics Get Weird, FPGAs Step In
* Resource Efficient DMA for FPGA Streaming Pipelines Implemented in SpinalHDL
* hdl-registers: The Smart Way to Build AXI-Lite IP Cores
* The New Spartan UltraScale+ Family
* Reset Strategies
* Enabling Fault Tolerance in an FPGA-Based RISC-V Processor Through Lockstep Detection and Replay Recovery
* What Software Development Got Right – And FPGA Design Can Now Use
* Ingenieure führen Camp #2

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